A fast transient low dropout regulator on 90 nm technology
Keywords:
Fast transient response, linear regulator, output capacitor less, robust
Abstract
This paper presents the design of a low dropout linear regulator for portable applications. The proposed circuit consists of a simple amplification scheme with a single gain stage plus the power transistor. Moreover, the circuit uses a current mirror to add part of input transconductance to the output, increasing the gain without load current. The simulations performed for the designed circuit in SYNOPSYS for a 90 nm technology show a robust performance to process, voltage and temperature variations with a settling time of 1μs. Also, the frequency response shows the minimum gain of 43 dB and a power supply rejection of -25 dB at 100 KHz. The power consumption without load current was 14 μA and it can deliver a maximum load current of 25 mA.
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References
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[11] P. M. Furth, S. Krishnapurapu, S. H. Pakala, and M. A. Haque, “A 5.3 uA quiescent current fully-integrated low-dropout (LDO) regulator with Transient Recovery Time Enhancement,” in Circuits and Systems (MWSCAS), 2013 IEEE 56th International Midwest Symposium on, Texas, 2013, pp. 9-12.
[12] Z. Kamal, Q. Hassan, and Z. Mouhcine, “Full on chip capacitance pmos low dropout voltage regulator,” in Multimedia Computing and Systems (ICMCS), 2011 International Conference on, Morocco, 2011, pp. 1-4.
[13] C.-E. Liu, Y.-J. Hsieh, and J.-F. Kiang, “RFID Regulator Design Insensitive to Supply Voltage Ripple and Temperature Variation,” Circuits Syst. II Express Briefs, IEEE Trans., vol. 57, no. 4, pp. 255-259, Apr. 2010.
[14] G. Blakiewicz, “Output-capacitorless low-dropout regulator using a cascoded flipped voltage follower,” Circuits, Devices Syst. IET, vol. 5, no. 5, pp. 418-423, Sep. 2011.
[15] K. C. Koay, S. S. Chong, and P. K. Chan, “A FVF based output capacitorless LDO regulator with wide load capacitance range,” in Circuits and Systems (ISCAS), 2013 IEEE International Symposium on, Beijing, 2013, pp. 1488-1491.
[2] S. S. Chong and P. K. Chan, “A Flipped Voltage Follower based low-dropout regulator with composite power transistor,” in Integrated Circuits (ISIC), 2011 13th International Symposium on, Singapore, 2011, pp. 472-475.
[3] M. Ho, K.-N. Leung, and K.-L. Mak, “A Low-Power Fast-Transient 90-nm Low-Dropout Regulator With Multiple Small-Gain Stages,” Solid-State Circuits, IEEE J., vol. 45, no. 11, pp. 2466-2475, Nov. 2010.
[4] W. Li, R. Yao, and L. Guo, “A CMOS low-dropout regulator with high power supply rejection,” in Electron Devices and Solid-State Circuits, 2009. EDSSC 2009. IEEE International Conference of, Xi’an,2009, pp. 384-387.
[5] Z. Yan, L. Shen, Y. Zhao, and S. Yue, “A low-voltage CMOS low-dropout regulator with novel capacitor-multiplier frequency compensation,” in Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on, Seattle, 2008, pp. 2685-2688.
[6] T. Y. Man, K. N. Leung, C. Y. Leung, P. K. T. Mok, and M. Chan, “Development of Single-Transistor-Control LDO Based on Flipped Voltage Follower for SoC,” Circuits Syst. I Regul. Pap. IEEE Trans., vol. 55, no. 5, pp. 1392- 1401, Jun. 2008.
[7] P. Y. Or and K. N. Leung, “A Fast-Transient Low-Dropout Regulator With Load-Tracking Impedance Adjustment and Loop-Gain Boosting Technique,” Circuits Syst. II Express Briefs, IEEE Trans., vol. 57, no. 10, pp. 757-761, Oct. 2010.
[8] C.-M. Chen, T.-W. Tsai, and C.-C. Hung, “Fast Transient Low-Dropout Voltage Regulator With Hybrid Dynamic Biasing Technique for SoC Application,” Very Large Scale Integr. Syst. IEEE Trans., vol. 21, no. 9, pp. 1742-1747, Sep. 2013.
[9] C. Zhan and W.-H. Ki, “Output-Capacitor-Free Adaptively Biased Low-Dropout Regulator for System-on-Chips,” Circuits Syst. I Regul. Pap. IEEE Trans., vol. 57, no. 5, pp. 1017-1028, May 2010.
[10] C. Zhan and W.-H. Ki, “An Output-Capacitor-Free Adaptively Biased Low-Dropout Regulator With Subthreshold Undershoot-Reduction for SoC,” Circuits Syst. I Regul. Pap. IEEE Trans., vol. 59, no. 5, pp. 1119-1131, May. 2012.
[11] P. M. Furth, S. Krishnapurapu, S. H. Pakala, and M. A. Haque, “A 5.3 uA quiescent current fully-integrated low-dropout (LDO) regulator with Transient Recovery Time Enhancement,” in Circuits and Systems (MWSCAS), 2013 IEEE 56th International Midwest Symposium on, Texas, 2013, pp. 9-12.
[12] Z. Kamal, Q. Hassan, and Z. Mouhcine, “Full on chip capacitance pmos low dropout voltage regulator,” in Multimedia Computing and Systems (ICMCS), 2011 International Conference on, Morocco, 2011, pp. 1-4.
[13] C.-E. Liu, Y.-J. Hsieh, and J.-F. Kiang, “RFID Regulator Design Insensitive to Supply Voltage Ripple and Temperature Variation,” Circuits Syst. II Express Briefs, IEEE Trans., vol. 57, no. 4, pp. 255-259, Apr. 2010.
[14] G. Blakiewicz, “Output-capacitorless low-dropout regulator using a cascoded flipped voltage follower,” Circuits, Devices Syst. IET, vol. 5, no. 5, pp. 418-423, Sep. 2011.
[15] K. C. Koay, S. S. Chong, and P. K. Chan, “A FVF based output capacitorless LDO regulator with wide load capacitance range,” in Circuits and Systems (ISCAS), 2013 IEEE International Symposium on, Beijing, 2013, pp. 1488-1491.
Published
2015-06-16
How to Cite
Gómez-Ortiz, H., Neira-Triana, C., & Angarita-Cediel, F. (2015). A fast transient low dropout regulator on 90 nm technology. ITECKNE, 12(1), 76-83. https://doi.org/https://doi.org/10.15332/iteckne.v12i1.824
Issue
Section
Research and Innovation Articles
